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ICCD
2003
IEEE
98views Hardware» more  ICCD 2003»
14 years 9 months ago
Specifying and Verifying Systems with Multiple Clocks
Multiple clock domains are a challenge for hardware specification and verification. We present a method for specifying the relations between multiple clocks, and for modeling th...
Edmund M. Clarke, Daniel Kroening, Karen Yorav
ICCD
2003
IEEE
111views Hardware» more  ICCD 2003»
14 years 9 months ago
Reducing Operand Transport Complexity of Superscalar Processors using Distributed Register Files
A critical problem in wide-issue superscalar processors is the limit on cycle time imposed by the central register file and operand bypass network. In this paper, a distributed re...
Santithorn Bunchua, D. Scott Wills, Linda M. Wills
ICCD
2003
IEEE
143views Hardware» more  ICCD 2003»
14 years 9 months ago
Cost-Effective Graceful Degradation in Speculative Processor Subsystems: The Branch Prediction Case
We analyze the effect of errors in branch predictors, a representative example of speculative processor subsystems, to motivate the necessity for fault tolerance in such subsystem...
Sobeeh Almukhaizim, Thomas Verdel, Yiorgos Makris
ICCD
2003
IEEE
104views Hardware» more  ICCD 2003»
14 years 9 months ago
On Reducing Register Pressure and Energy in Multiple-Banked Register Files
The storage for speculative values in superscalar processors is one of the main sources of complexity and power dissipation. In this paper, we present a novel technique to reduce ...
Jaume Abella, Antonio González
ICCD
2003
IEEE
112views Hardware» more  ICCD 2003»
14 years 9 months ago
Power Efficient Data Cache Designs
This paper investigates some power efficient data cache designs that try to significantly reduce the cache energy consumption, both static and dynamic, with a minimal impact in pe...
Jaume Abella, Antonio González
ICCD
2003
IEEE
89views Hardware» more  ICCD 2003»
14 years 9 months ago
Precomputation-based Guarding for Dynamic and Leakage Power Reduction
- This paper presents a precomputation-based guarding technique to reduce both dynamic and static power consumptions in CMOS VLSI circuits. More precisely, a high threshold sleep t...
Afshin Abdollahi, Massoud Pedram, Farzan Fallah, I...