IEEEPACT
2006
IEEE
14 years 5 months ago
2006
IEEE
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
IEEEPACT
2006
IEEE
14 years 5 months ago
2006
IEEE
IEEEPACT
2006
IEEE
14 years 5 months ago
2006
IEEE
Thread escape analysis conservatively determines which objects may be accessed in more than one thread. Thread escape analysis is useful for a variety of purposes – finding rac...
IEEEPACT
2006
IEEE
14 years 5 months ago
2006
IEEE
Previous studies have demonstrated the advantages of single-ISA heterogeneous multi-core architectures for power and performance. However, none of those studies examined how to de...
IEEEPACT
2006
IEEE
14 years 5 months ago
2006
IEEE
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
IEEEPACT
2006
IEEE
14 years 5 months ago
2006
IEEE
action for Large-Scale Computation Jeff Dean Google, Inc.
IEEEPACT
2006
IEEE
14 years 5 months ago
2006
IEEE
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
IEEEPACT
2006
IEEE
14 years 5 months ago
2006
IEEE
IEEEPACT
2006
IEEE
14 years 5 months ago
2006
IEEE
Modeling and analysis of program behavior are at the foundation of computer system design and optimization. As computer systems become more adaptive, their efficiency increasingly...
IEEEPACT
2006
IEEE
14 years 5 months ago
2006
IEEE
A recent trend in computing are domain-specific program generators, designed to alleviate the effort of porting and reoptimizing libraries for fast-changing and increasingly com...