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IOLTS
2006
IEEE
84views Hardware» more  IOLTS 2006»
14 years 5 months ago
An Improved Technique for Reducing False Alarms Due to Soft Errors
A significant fraction of soft errors in modern microprocessors has been reported to never lead to a system failure. Any concurrent error detection scheme that raises alarm every ...
Sandip Kundu, Ilia Polian
IOLTS
2006
IEEE
84views Hardware» more  IOLTS 2006»
14 years 5 months ago
Fault Tolerant System Design Method Based on Self-Checking Circuits
This paper describes a highly reliable digital circuit design method based on totally self checking blocks implemented in FPGAs. The bases of the self checking blocks are parity p...
Pavel Kubalík, Petr Fiser, Hana Kubatova
IOLTS
2006
IEEE
101views Hardware» more  IOLTS 2006»
14 years 5 months ago
Delay Fault Localization in Test-Per-Scan BIST Using Built-In Delay Sensor
— Delay failures are becoming a dominant failure mechanism in nanometer technologies. Diagnosis of such failures is important to ensure yield and robustness of the design. Howeve...
Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury,...
IOLTS
2006
IEEE
102views Hardware» more  IOLTS 2006»
14 years 5 months ago
Emulation-based Fault Injection in Circuits with Embedded Memories
FPGA emulation has proven to be a performance effective method to analyse the behaviour of digital circuits in the presence of soft errors due to SEU effects. In particular, the r...
Mario García-Valderas, Marta Portela-Garc&i...
IOLTS
2006
IEEE
100views Hardware» more  IOLTS 2006»
14 years 5 months ago
A Note on Error Detection in an RSA Architecture by Means of Residue Codes
Recently, various attacks have been proposed against many cryptosystems, exploiting deliberate error injection during the computation process. In this paper, we add a residue-base...
Luca Breveglieri, Paolo Maistri, Israel Koren
IOLTS
2006
IEEE
77views Hardware» more  IOLTS 2006»
14 years 5 months ago
Design of a Robust 8-Bit Microprocessor to Soft Errors
This work presents a fault-tolerant version of the
Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt...
IOLTS
2006
IEEE
81views Hardware» more  IOLTS 2006»
14 years 5 months ago
Evaluating SEU and Crosstalk Effects in Network-on-Chip Routers
This work intends to evaluate the effect of a Single Event Upsets (SEUs) and crosstalk faults in a NoC router architecture by developing a fault injection mechanism, allowing an a...
Arthur Pereira Frantz, Luigi Carro, Érika F...
IOLTS
2006
IEEE
103views Hardware» more  IOLTS 2006»
14 years 5 months ago
Designing Robust Checkers in the Presence of Massive Timing Errors
So far, performance and reliability of circuits have been determined by worst-case characterization of silicon and environmental noise. As new deep sub-micron technologies exacerb...
Frederic Worm, Patrick Thiran, Paolo Ienne
IOLTS
2006
IEEE
68views Hardware» more  IOLTS 2006»
14 years 5 months ago
Power Attacks on Secure Hardware Based on Early Propagation of Data
The early propagation effect found in many logic gates is a potential source of data-dependent power consumption. We show that the effect and the corresponding power dependency ca...
Konrad J. Kulikowski, Mark G. Karpovsky, Alexander...