Sciweavers

ISCA
1998
IEEE
128views Hardware» more  ISCA 1998»
14 years 3 months ago
Modeling Program Predictability
Basic properties of program predictability
Yiannakis Sazeides, James E. Smith
ISCA
1998
IEEE
115views Hardware» more  ISCA 1998»
14 years 3 months ago
Improving the Throughput of a Pipeline by Insertion of Delays
Janak H. Patel, Edward S. Davidson
ISCA
1998
IEEE
119views Hardware» more  ISCA 1998»
14 years 3 months ago
Using Prediction to Accelerate Coherence Protocols
Most large shared-memory multiprocessors use directory protocols to keep per-processor caches coherent. Some memory references in such systems, however, suffer long latencies for ...
Shubhendu S. Mukherjee, Mark D. Hill
ISCA
1998
IEEE
125views Hardware» more  ISCA 1998»
14 years 3 months ago
Active Pages: A Computation Model for Intelligent Memory
Microprocessors and memory systems su er from a growing gap in performance. We introduce Active Pages, a computation model which addresses this gap by shifting data-intensive comp...
Mark Oskin, Frederic T. Chong, Timothy Sherwood
ISCA
1998
IEEE
119views Hardware» more  ISCA 1998»
14 years 3 months ago
Execution Characteristics of Desktop Applications on Windows NT
This paper examines the performance of desktop applications running on the Microsoft Windows NT operating system on Intel x86 processors, and contrasts these applications to the p...
Dennis C. Lee, Patrick Crowley, Jean-Loup Baer, Th...
ISCA
1998
IEEE
108views Hardware» more  ISCA 1998»
14 years 3 months ago
Pipeline Gating: Speculation Control for Energy Reduction
Branch prediction has enabled microprocessors to increase instruction level parallelism (ILP) by allowing programs to speculatively execute beyond control boundaries. Although spe...
Srilatha Manne, Artur Klauser, Dirk Grunwald
ISCA
1998
IEEE
136views Hardware» more  ISCA 1998»
14 years 3 months ago
Exploiting Spatial Locality in Data Caches Using Spatial Footprints
Modern cache designs exploit spatial locality by fetching large blocks of data called cache lines on a cache miss. Subsequent references to words within the same cache line result...
Sanjeev Kumar, Christopher B. Wilkerson
ISCA
1998
IEEE
143views Hardware» more  ISCA 1998»
14 years 3 months ago
Lockup-Free Instruction Fetch/Prefetch Cache Organization
In the past decade. there has been much literature describing various cache organizatrons that exploit general programming idiosyncrasies to obtain maxrmum hit rate (the probabili...
David Kroft
ISCA
1998
IEEE
102views Hardware» more  ISCA 1998»
14 years 3 months ago
The DASH Prototype: Implementation and Performance
Daniel Lenoski, James Laudon, Truman Joe, David Na...