ISCA
2007
IEEE
14 years 6 months ago
2007
IEEE
Transient faults due to particle strikes are a key challenge in microprocessor design. Driven by exponentially increasing transistor counts, per-chip faults are a growing burden. ...
ISCA
2007
IEEE
14 years 6 months ago
2007
IEEE
Process variation affects processor pipelines by making some stages slower and others faster, therefore exacerbating pipeline unbalance. This reduces the frequency attainable by t...
ISCA
2007
IEEE
14 years 6 months ago
2007
IEEE
Concern for the increasing susceptibility of processor structures to transient errors has led to several recent research efforts that propose architectural techniques to enhance r...
ISCA
2007
IEEE
14 years 6 months ago
2007
IEEE
The commonly used LRU replacement policy is susceptible to thrashing for memory-intensive workloads that have a working set greater than the available cache size. For such applica...
ISCA
2007
IEEE
14 years 6 months ago
2007
IEEE
Speculative compiler optimizations are effective in improving both single-thread performance and reducing power consumption, but their implementation introduces significant compl...
ISCA
2007
IEEE
14 years 6 months ago
2007
IEEE
There has been considerable recent interest in the support of transactional memory (TM) in both hardware and software. We present an intermediate approach, in which hardware is us...
ISCA
2007
IEEE
14 years 6 months ago
2007
IEEE
Store misses cause significant delays in shared-memory multiprocessors because of limited store buffering and ordering constraints required for proper synchronization. Today, prog...
ISCA
2007
IEEE
14 years 6 months ago
2007
IEEE
Virtual Private Machines (VPM) provide a framework for Quality of Service (QoS) in CMP-based computer systems. VPMs incorporate microarchitecture mechanisms that allow shares of h...
ISCA
2007
IEEE
14 years 6 months ago
2007
IEEE
The ever increasing sizes of on-chip caches and the growing domination of wire delay necessitate significant changes to cache hierarchy design methodologies. Many recent proposal...
ISCA
2007
IEEE
14 years 6 months ago
2007
IEEE
This paper quantifies the effect of architectural design decisions on the performance of TxLinux. TxLinux is a Linux kernel modified to use transactions in place of locking prim...