ISCAS
1999
IEEE
14 years 4 months ago
1999
IEEE
ISCAS
1999
IEEE
14 years 4 months ago
1999
IEEE
ISCAS
1999
IEEE
14 years 4 months ago
1999
IEEE
In a companion paper of this session [1] we formally defined the notion of equivalence classes of circuits which are physical clones of an existing benchmark seed circuit created ...
ISCAS
1999
IEEE
14 years 4 months ago
1999
IEEE
ISCAS
1999
IEEE
14 years 4 months ago
1999
IEEE
A method for modeling complex CMOS gates by the reduction of each gate to an effective equivalent inverter is introduced. The conducting and parasitic behavior of parallel and ser...
ISCAS
1999
IEEE
14 years 4 months ago
1999
IEEE
Dynamic translinear (DTL) circuits use the exponential inputoutput relation of the transistor as a primitive for the synthesis of electronic circuits. As a consequence the analysi...
ISCAS
1999
IEEE
14 years 4 months ago
1999
IEEE
ISCAS
1999
IEEE
14 years 4 months ago
1999
IEEE
Noise analysis of higher-order translinear filters cannot be established through straight-forward extension of analysis techniques for first-order TL filters, due to the presence n...
ISCAS
1999
IEEE
14 years 4 months ago
1999
IEEE
- Closed form solutions for the 50% delay, rise time, overshoot characteristics, and settling time of signals in an RLC tree are presented. These solutions have the same accuracy c...
ISCAS
1999
IEEE
14 years 4 months ago
1999
IEEE
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...