ISSS
1996
IEEE
14 years 4 months ago
1996
IEEE
In this paper we present the problem of flow graph balancing for minimizingthe required memory bandwidth. Our goal is to minimize the required memory bandwidth within the given cy...
ISSS
1996
IEEE
14 years 4 months ago
1996
IEEE
ISSS
1996
IEEE
14 years 4 months ago
1996
IEEE
In design of an embedded system with a cache, it is important to minimize the cache miss rate to reduce the power consumption as well as to improvethe performance of the system. W...
ISSS
1996
IEEE
14 years 4 months ago
1996
IEEE
ISSS
1996
IEEE
14 years 4 months ago
1996
IEEE
In this paper we address a resource
ISSS
1996
IEEE
14 years 4 months ago
1996
IEEE
In the paper the problem of processor/compiler codesign for digital signal processing and embedded SYstems is discussed. The main principle we follow is the top-down approach char...
ISSS
1996
IEEE
14 years 4 months ago
1996
IEEE
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...
ISSS
1996
IEEE
14 years 4 months ago
1996
IEEE
An address generation and optimization environment (ADOPT) for distributed memory architectures, is presented. ADOPT is oriented to minimize the area overhead introduced by the us...
ISSS
1996
IEEE
14 years 4 months ago
1996
IEEE
ISSS
1996
IEEE
14 years 4 months ago
1996
IEEE
Traditionally, application specific computations have been focusing on numerically intensive data manipulation. Modern communications and DSP applications, such as WWW, interactiv...