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ITC
1995
IEEE
122views Hardware» more  ITC 1995»
14 years 3 months ago
A Fault Model and a Test Method for Analog Fuzzy Logic Circuits
A nalog circuit implementations of fuzzy logic are characterized by performing logical connectives of analog signals. They can be considered as generalization of digital circuits ...
Stefan Weiner
ITC
1995
IEEE
104views Hardware» more  ITC 1995»
14 years 3 months ago
Synthesis of Mapping Logic for Generating Transformed Pseudo-Random Patterns for BIST
During built-in self-test (BIST), the set of patterns generated by a pseudo-random pattern generator may not provide a sufficiently high fault coverage. This paper presents a new ...
Nur A. Touba, Edward J. McCluskey
ITC
1995
IEEE
124views Hardware» more  ITC 1995»
14 years 3 months ago
An Experimental Chip to Evaluate Test Techniques: Experiment Results
This paper describes the testing of a chip especially designed to facilitate the evaluation of various test techniques for combinational circuitry. The different test sets and tes...
Siyad C. Ma, Piero Franco, Edward J. McCluskey
ITC
1995
IEEE
102views Hardware» more  ITC 1995»
14 years 3 months ago
Visualizing Quality
Real-world data is known to be imperfect, suffering from various forms of defects such as sensor variability, estimation errors, uncertainty, human errors in data entry, and gaps ...
Solomon Max
ITC
1995
IEEE
116views Hardware» more  ITC 1995»
14 years 3 months ago
An Experimental Chip to Evaluate Test Techniques: Chip and Experiment Design
An experiment has been designed to evaluate multiple testing techniques for combinational circuits. To perform the experiment, a 25k gate CMOS Test Chip has been designed, manufac...
Piero Franco, William D. Farwell, Robert L. Stokes...