CSFW
2005
IEEE
14 years 6 months ago
2005
IEEE
We consider expansions of the Abadi-Rogaway logic of indistinguishability of formal cryptographic expressions. We expand the logic in order to cover cases when partial information...
GLVLSI
2006
IEEE
14 years 6 months ago
2006
IEEE
Most of the logic synthesis algorithms are not scalable for large networks and, for this reason, partitioning is often applied. However traditional mincut-based partitioning techn...
TARK
2007
Springer
14 years 6 months ago
2007
Springer
In the most popular logics combining knowledge and awareness, it is not possible to express statements about knowledge of unawareness such as “Ann knows that Bill is aware of so...
SEMWEB
2007
Springer
14 years 6 months ago
2007
Springer
Classical ontologies are not suitable to represent imprecise nor uncertain pieces of information. As a solution we will combine fuzzy Description Logics with a possibilistic layer....
LPNMR
2007
Springer
14 years 6 months ago
2007
Springer
Abstract. In this paper, we present a logic R for rule bases by introducing a set of rule connectives. We define both the models and extensions of a rule base. The semantics of ex...
LOPSTR
2007
Springer
14 years 6 months ago
2007
Springer
CooML is an object-oriented modeling language where specifications are theories in a constructive logic designed to handle incomplete information. In this logic we view snapshots ...
ESOP
2007
Springer
14 years 6 months ago
2007
Springer
We study the relationship between Concurrent Separation Logic (CSL) and the assume-guarantee (A-G) method (a.k.a. rely-guarantee method). We show in three steps that CSL can be tre...
CSL
2007
Springer
14 years 6 months ago
2007
Springer
We study the complexity of satisfiability for DLP+ dyn , an expressive logic introduced by Demri that allows to reason about dynamic policies. DLP+ dyn extends the logic DLPdyn of...
LICS
2007
IEEE
14 years 6 months ago
2007
IEEE
Nested words are a structured model of execution paths in procedural programs, reflecting their call and return nesting structure. Finite nested words also capture the structure ...
ISMVL
2007
IEEE
14 years 6 months ago
2007
IEEE
In this paper we present fault tolerant CMOS logic using redundancy and ternary signals. The ternary gates are implemented using recharge logic which can be exploited in binary an...