Sciweavers

DAC
1996
ACM
13 years 11 months ago
POSE: Power Optimization and Synthesis Environment
Recent trends in the semiconductor industry have resulted in an increasing demand for low power circuits. POSE is a step in providing the EDA community and academia with an enviro...
Sasan Iman, Massoud Pedram
DAC
1997
ACM
13 years 11 months ago
ATPG for Heat Dissipation Minimization During Scan Testing
An ATPG technique is proposed that reduces heat dissipation during testing of sequential circuits that have full-scan. The objective is to permit safe and inexpensive testing of l...
Seongmoon Wang, Sandeep K. Gupta
VLSID
2002
IEEE
207views VLSI» more  VLSID 2002»
14 years 7 months ago
Synthesis of High Performance Low Power Dynamic CMOS Circuits
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
Debasis Samanta, Nishant Sinha, Ajit Pal