Sciweavers

ISCAS
2011
IEEE
288views Hardware» more  ISCAS 2011»
13 years 5 months ago
Multi-layer parallel decoding algorithm and vlsi architecture for quasi-cyclic LDPC codes
—We propose a multi-layer parallel decoding algorithm and VLSI architecture for decoding of structured quasi-cyclic low-density parity-check codes. In the conventional layered de...
Yang Sun, Guohui Wang, Joseph R. Cavallaro
ASAP
2009
IEEE
120views Hardware» more  ASAP 2009»
14 years 11 months ago
Design and Implementation of a Radix-4 Complex Division Unit with Prescaling
—We present a design and implementation of a radix-4 complex division unit with prescaling of the operands. Specifically, we extend the treatment of the residual bound and error...
Pouya Dormiani, Milos D. Ercegovac, Jean-Michel Mu...