Sciweavers

ICLP
1993
Springer
14 years 4 months ago
On Copy Avoidance in Single Assignment Languages
: Copy avoidance refers to the safe replacement, at compile time, of copying operations by destructive updates in single-assignment languages. Conceptually, the problem can be divi...
Saumya K. Debray
GLVLSI
2003
IEEE
173views VLSI» more  GLVLSI 2003»
14 years 5 months ago
40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...
Michael I. Fuller, James P. Mabry, John A. Hossack...
IEEESCC
2005
IEEE
14 years 6 months ago
Abacus: A Service-Oriented Programming Language for Grid Applications
This paper presents Abacus, a service-oriented programming language designed for the development of grid applications. Abacus considers that all the grid resources constitute a un...
Xiaoning Wang, Lijuan Xiao, Wei Li, Zhiwei Xu
ETFA
2006
IEEE
14 years 6 months ago
A Framework for Fault Tolerant Real Time Systems Based on Reconfigurable FPGAs
♦ To increase the amount of logic available to the users in SRAM-based FPGAs, manufacturers are using nanometric technologies to boost logic density and reduce costs, making its ...
Manuel G. Gericota, Luís F. Lemos, Gustavo ...
DDECS
2007
IEEE
140views Hardware» more  DDECS 2007»
14 years 6 months ago
A Framework for Self-Healing Radiation-Tolerant Implementations on Reconfigurable FPGAs
— To increase the amount of logic available in SRAM-based FPGAs manufacturers are using nanometric technologies to boost logic density and reduce prices. However, nanometric scal...
Manuel G. Gericota, Luís F. Lemos, Gustavo ...
ISQED
2008
IEEE
151views Hardware» more  ISQED 2008»
14 years 6 months ago
Quality of a Bit (QoB): A New Concept in Dependable SRAM
We propose a novel dependable SRAM with 7T memory cells, and introduce a new concept, “quality of a bit (QoB)” for it. The proposed SRAM has three modes: a typical mode, high-...
Hidehiro Fujiwara, Shunsuke Okumura, Yusuke Iguchi...
ISAAC
2009
Springer
130views Algorithms» more  ISAAC 2009»
14 years 7 months ago
Counting in the Presence of Memory Faults
The faulty memory RAM presented by Finocchi and Italiano [1] is a variant of the RAM model where the content of any memory cell can get corrupted at any time, and corrupted cells c...
Gerth Stølting Brodal, Allan Grønlun...