y abstract, it is grounded in the experience of many markets. As I will illustrate, it explains much strategic behavior. Information spreads With a bit of effort, any technically s...
Design complexity is rapidly becoming a limiting factor in the design of modern, high-performance microprocessors. This paper introduces an optimization technique to improve the e...
The microarchitectural design space of a new processor is too large for an architect to evaluate in its entirety. Even with the use of statistical simulation, evaluation of a sing...
Christophe Dubach, Timothy M. Jones, Michael F. P....
In deep sub-micron ICs, growing amounts of ondie memory and scaling effects make embedded memories increasingly vulnerable to reliability and yield problems. As scaling progresses...
Jangwoo Kim, Nikos Hardavellas, Ken Mai, Babak Fal...
We have developed Argus, a novel approach for providing low-cost, comprehensive error detection for simple cores. The key to Argus is that the operation of a von Neumann core cons...
Transactional Memory (TM) systems must track the read and write sets—items read and written during a transaction—to detect conflicts among concurrent transactions. Several TM...
Daniel Sanchez, Luke Yen, Mark D. Hill, Karthikeya...
Current on-chip block-centric memory hierarchies exploit access patterns at the fine-grain scale of small blocks. Several recently proposed techniques for coherence traffic reduct...