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MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
14 years 6 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
MICRO
2007
IEEE
150views Hardware» more  MICRO 2007»
14 years 6 months ago
Leveraging 3D Technology for Improved Reliability
Aggressive technology scaling over the years has helped improve processor performance but has caused a reduction in processor reliability. Shrinking transistor sizes and lower sup...
Niti Madan, Rajeev Balasubramonian
MICRO
2007
IEEE
167views Hardware» more  MICRO 2007»
14 years 6 months ago
Informed Microarchitecture Design Space Exploration Using Workload Dynamics
Program runtime characteristics exhibit significant variation. As microprocessor architectures become more complex, their efficiency depends on the capability of adapting with wor...
Chang-Burm Cho, Wangyuan Zhang, Tao Li
MICRO
2007
IEEE
73views Hardware» more  MICRO 2007»
14 years 6 months ago
Guaranteeing Hits to Improve the Efficiency of a Small Instruction Cache
Stephen Hines, David B. Whalley, Gary S. Tyson
MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
14 years 6 months ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...
MICRO
2007
IEEE
108views Hardware» more  MICRO 2007»
14 years 6 months ago
FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators
This paper describes FAST, a novel simulation methodology that can produce simulators that (i) are orders of magnitude faster than comparable simulators, (ii) are cycleaccurate, (...
Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Pa...
MICRO
2007
IEEE
79views Hardware» more  MICRO 2007»
14 years 6 months ago
Self-calibrating Online Wearout Detection
Technology scaling, characterized by decreasing feature size, thinning gate oxide, and non-ideal voltage scaling, will become a major hindrance to microprocessor reliability in fu...
Jason A. Blome, Shuguang Feng, Shantanu Gupta, Sco...
MICRO
2007
IEEE
103views Hardware» more  MICRO 2007»
14 years 6 months ago
Mitigating Parameter Variation with Dynamic Fine-Grain Body Biasing
Parameter variation is detrimental to a processor’s frequency and leakage power. One proposed technique to mitigate it is Fine-Grain Body Biasing (FGBB), where different parts o...
Radu Teodorescu, Jun Nakano, Abhishek Tiwari, Jose...
MICRO
2007
IEEE
128views Hardware» more  MICRO 2007»
14 years 6 months ago
A Framework for Providing Quality of Service in Chip Multi-Processors
The trends in enterprise IT toward service-oriented computing, server consolidation, and virtual computing point to a future in which workloads are becoming increasingly diverse i...
Fei Guo, Yan Solihin, Li Zhao, Ravishankar Iyer