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CF
2005
ACM
14 years 1 months ago
Drowsy region-based caches: minimizing both dynamic and static power dissipation
Power consumption within the memory hierarchy grows in importance as on-chip data caches occupy increasingly greater die area. Among dynamic power conservation schemes, horizontal...
Michael J. Geiger, Sally A. McKee, Gary S. Tyson
ASPDAC
2005
ACM
93views Hardware» more  ASPDAC 2005»
14 years 1 months ago
Power minimization for dynamic PLAs
—Dynamic programmable logic arrays (PLAs) which are built of the NOR–NOR structure, have been very popular in high performance design because of their high-speed and predictabl...
Tzyy-Kuen Tien, Chih-Shen Tsai, Shih-Chieh Chang, ...
ASPDAC
2005
ACM
70views Hardware» more  ASPDAC 2005»
14 years 1 months ago
A variation-aware low-power coding methodology for tightly coupled buses
- This paper describes a novel low-power coding methodology for buses. Ultra deep submicron technology and system-on-chip have resulted in a considerable portion of power consumpti...
Masanori Muroyama, Kosuke Tarumi, Koji Makiyama, H...
AHS
2006
IEEE
108views Hardware» more  AHS 2006»
14 years 1 months ago
A Multi-Objective Genetic Algorithm for On-Chip Real-time Adaptation of a Multi-Carrier Based Telecommunications Receiver
This paper presents a multi-objective algorithm for on-line adaptation of a multi-carrier code-division multiple access (MC-CDMA) receiver. A specially tailored Genetic Algorithm ...
Nasri Sulaiman, Ahmet T. Erdogan
CF
2008
ACM
14 years 1 months ago
Low power microarchitecture with instruction reuse
Power consumption has become a very important metric and challenging research topic in the design of microprocessors in the recent years. The goal of this work is to improve power...
Frederico Pratas, Georgi Gaydadjiev, Mladen Bereko...
ICDCS
2010
IEEE
14 years 1 months ago
Mistral: Dynamically Managing Power, Performance, and Adaptation Cost in Cloud Infrastructures
—Server consolidation based on virtualization is a key ingredient for improving power efficiency and resource utilization in cloud computing infrastructures. However, to provide...
Gueyoung Jung, Matti A. Hiltunen, Kaustubh R. Josh...
HAIS
2010
Springer
14 years 1 months ago
Power Prediction in Smart Grids with Evolutionary Local Kernel Regression
Electric grids are moving from a centralized single supply chain towards a decentralized bidirectional grid of suppliers and consumers in an uncertain and dynamic scenario. Soon, t...
Oliver Kramer, Benjamin Satzger, Jörg Lä...
ASPDAC
2008
ACM
151views Hardware» more  ASPDAC 2008»
14 years 1 months ago
High performance current-mode differential logic
This paper presents a new logic style, named Current-Mode Differential logic (CMDL), that achieves both high operating speed and low power consumption. Inspired by the low-voltage ...
Ling Zhang, Jianhua Liu, Haikun Zhu, Chung-Kuan Ch...
ASPDAC
2008
ACM
108views Hardware» more  ASPDAC 2008»
14 years 1 months ago
Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block sel
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
Jui-Yuan Hsieh, Shanq-Jang Ruan
CSE
2009
IEEE
14 years 2 months ago
Rotation Scheduling and Voltage Assignment to Minimize Energy for SoC
— Low energy consumption is a critical issue in embedded systems design. As the technology feature sizes of SoC (Systems on Chip) become smaller and smaller, the percentage of le...
Meikang Qiu, Laurence Tianruo Yang, Edwin Hsing-Me...