ISPD
2005
ACM
14 years 6 months ago
2005
ACM
This paper presents an efficient heuristic algorithm to design a power distribution network of a chip by employing a successive partitioning and grid refinement scheme. In an it...
VLSID
2004
IEEE
15 years 25 days ago
2004
IEEE
With shrinking noise margins and increasing numbers of on-chip noise sources, power grid design has become a critical performance determinant. This paper presents an overview of r...