Sciweavers

RECONFIG
2009
IEEE
172views VLSI» more  RECONFIG 2009»
14 years 2 months ago
Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow
Abstract—The main challenge when implementing cryptographic algorithms in hardware is to protect them against attacks that target directly the device. Two strategies are customar...
Shivam Bhasin, Jean-Luc Danger, Florent Flament, T...
RECONFIG
2009
IEEE
269views VLSI» more  RECONFIG 2009»
14 years 2 months ago
A 10 Gbps OTN Framer Implementation Targeting FPGA Devices
Abstract—Integrated circuits for very high-speed telecommunication protocols often use ASICs, due to their strict timing constraints. This scenario is changing, since modern FPGA...
Guilherme Guindani, Frederico Ferlini, Jeferson Ol...
RECONFIG
2009
IEEE
118views VLSI» more  RECONFIG 2009»
14 years 2 months ago
Protecting the NOEKEON Cipher against SCARE Attacks in FPGAs by Using Dynamic Implementations
Abstract. Protecting an implementation against Side Channel Analysis for Reverse Engineering (SCARE) attacks is a great challenge and we address this challenge by presenting a fir...
Julien Bringer, Hervé Chabanne, Jean-Luc Da...
RECONFIG
2009
IEEE
141views VLSI» more  RECONFIG 2009»
14 years 2 months ago
Enhancing the Productivity of Radio Designers with RapidRadio
—In this paper the RapidRadio framework for signal classification and receiver deployment is discussed. The framework is a productivity enhancing tool that reduces the required ...
Jorge Surís, Adolfo Recio, Peter Athanas
RECONFIG
2009
IEEE
182views VLSI» more  RECONFIG 2009»
14 years 2 months ago
Scalability Studies of the BLASTn Scan and Ungapped Extension Functions
BLASTn is a ubiquitous tool used for large scale DNA analysis. Detailed profiling tests reveal that the most computationally intensive sections of the BLASTn algorithm are the sc...
Siddhartha Datta, Ron Sass
RECONFIG
2009
IEEE
145views VLSI» more  RECONFIG 2009»
14 years 2 months ago
A New Approach to Implement Discrete Wavelet Transform Using Collaboration of Reconfigurable Elements
Asadollah Shahbahrami, Mahmood Ahmadi, Stephan Won...
RECONFIG
2009
IEEE
188views VLSI» more  RECONFIG 2009»
14 years 2 months ago
Accelerating Cryptographic Applications Using Dynamically Reconfigurable Functional Units
Antoine Trouve, Lovic Gauthier, Takayuki Kando, Be...
ISCC
2009
IEEE
210views Communications» more  ISCC 2009»
14 years 2 months ago
Towards a Java bytecodes compiler for Nios II soft-core processor
Reconfigurable computing is one of the most recent research topics in computer science. The Altera™ Nios II soft-core processor can be included in a large set of reconfigurable ...
Willian dos Santos Lima, Renata Spolon Lobato, Ale...

Lecture Notes
1005views
15 years 7 months ago
Lectures on reconfigurable computing
Driven by recent innovations in Field-Programmable Gate Arrays (FPGAs), reconfigurable computing offers unique ways to accelerate key algorithms. FPGAs offer a programmable logic f...
Sherief Reda

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Sherief RedaProfessor, Assistant
Brown University
Sherief Reda
Sherief Reda is an Assistant Professor at the Division of Engineering, Brown University. Professor Reda received his Ph.D. degree in computer engineering (and science) from Univers...