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GLVLSI
2010
IEEE
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13 years 11 months ago
Energy-efficient redundant execution for chip multiprocessors
Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible to wear-out related permanent faults and transient faults, necessitating on-chi...
Pramod Subramanyan, Virendra Singh, Kewal K. Saluj...
ASPLOS
2006
ACM
14 years 3 months ago
SlicK: slice-based locality exploitation for efficient redundant multithreading
Transient faults are expected a be a major design consideration in future microprocessors. Recent proposals for transient fault detection in processor cores have revolved around t...
Angshuman Parashar, Anand Sivasubramaniam, Sudhanv...
HOTOS
2007
IEEE
14 years 3 months ago
Relaxed Determinism: Making Redundant Execution on Multiprocessors Practical
Given that the majority of future processors will contain an abundance of execution cores, redundant execution can offer a promising method for increasing the availability and res...
Jesse Pool, Ian Sin Kwok Wong, David Lie
APCSAC
2005
IEEE
14 years 5 months ago
Resource-Driven Optimizations for Transient-Fault Detecting SuperScalar Microarchitectures
Increasing microprocessor vulnerability to soft errors induced by neutron and alpha particle strikes prevents aggressive scaling and integration of transistors in future technologi...
Jie Hu, Greg M. Link, Johnsy K. John, Shuai Wang, ...
HPCA
2008
IEEE
14 years 11 months ago
Supporting highly-decoupled thread-level redundancy for parallel programs
The continued scaling of device dimensions and the operating voltage reduces the critical charge and thus natural noise tolerance level of transistors. As a result, circuits can p...
M. Wasiur Rashid, Michael C. Huang
ASPLOS
2009
ACM
15 years 2 days ago
Understanding software approaches for GPGPU reliability
Even though graphics processors (GPUs) are becoming increasingly popular for general purpose computing, current (and likely near future) generations of GPUs do not provide hardwar...
Martin Dimitrov, Mike Mantor, Huiyang Zhou