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    VLSID
    2006
    IEEE
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    A High-Performance VLSI Architecture for Advanced Encryption Standard (AES) Algorithm
    15 years 2 months ago
    A High-Performance VLSI Architecture for Advanced Encryption Standard (AES) Algorithm
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    In this paper we present a high-performance, high throughput, and area efficient architecture for the VLSI implementation of the AES algorithm. The subkeys, required for each round...
    Naga M. Kosaraju, Murali R. Varanasi, Saraju P. Mo...
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