In this paper a new ultra low power SRAM cell is proposed. In the proposed SRAM topology, additional circuitry has been added to a standard 6T-SRAM cell to improve the static nois...
Farshad Moradi, Dag T. Wisland, Snorre Aunet, Hami...
—Mismatch-shaping Dynamic Element Matching (DEM) methods are extensively used in multi-bit Sigma-Delta Modulators (SDM) to reduce the effects of element mismatches. To date, only...
In this paper, new SRAM cell design methods for FinFET technology are proposed. One of the most important features of FinFET is that the independent front and back gate can be bia...
— A methodology is proposed to reduce power/ground and substrate coupling noise by randomizing the clock signal. A pseudo-random number generation algorithm is used to produce a ...
— Scaling down the voltage levels of the processing elements (PEs) in a Network-on-Chip (NoC) can significantly reduce the computation energy consumption with an overhead of the...
Abstract— In this paper we present an efficient system-onchip implementation of a 1-Gbps LDPC decoder for 4G (or beyond 3G) wireless standards. The decoder has a scalable datapa...
— Several design metrics have been used in the past to evaluate the SRAM cell stability. However, most of them fail to provide the exact stability figures as shown in this paper...
Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Sar...
— Lowering supply voltage is an effective technique for power reduction in memory design, however traditional memory cell design fails to operate, as shown in [3], [10], at ultra...
Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Sar...