CODES
2005
IEEE
14 years 6 months ago
2005
IEEE
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
FDL
2006
IEEE
14 years 6 months ago
2006
IEEE
Transaction Level Models are widely being used as high-level reference models during embedded systems development. High simulation speed and great modeling flexibility are the ma...
FDL
2007
IEEE
14 years 7 months ago
2007
IEEE
Transaction level models (TLMs) can be constructed at t levels of abstraction, denoted as untimed (UT), cycle-approximate (CX), and cycle accurate (CA) in this paper. The choice o...
CODES
2008
IEEE
14 years 7 months ago
2008
IEEE
In this special session we explore holistic approaches to hardware/software debug that use or integrate transaction level models (TLMs). We present several TLM-based approaches to...
DATE
2009
IEEE
14 years 7 months ago
2009
IEEE
—The need to have Transaction Level models early in the design cycle is becoming more and more important to shorten the development times of complex Systems-on-Chip (SoC). These ...