Power optimization of core-based systems by address bus encoding

— This paper presents a solution to the problem of reducing the power dissipated by a digital system containing an intellectual proprietary core processor which repeatedly executes a special-purpose program. The proposed method relies on a novel, application-dependent low-power address bus encoding scheme. The analysis of the execution traces of a given program allows an accurate computation of the correlations that may exist between blocks of bits in consecutive patterns; this information can be successfully exploited to determine an encoding which sensibly reduces the bus transition activity. Experimental results, obtained on a set of special-purpose applications, are very sat

• Type: Journal
• Year: 1998
• Where: TVLSI
• Authors: Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Stefano Quer
• Keywords: Bus Encoding Scheme, Proprietary Core Processor, Special-purpose Program, TVLSI 1998