Sciweavers
Explore
Publications
Books
Software
Tutorials
Presentations
Lectures Notes
Datasets
Labs
Conferences
Community
Upcoming
Conferences
Top Ranked Papers
Most Viewed Conferences
Conferences by Acronym
Conferences by Subject
Conferences by Year
Tools
Sci2ools
International Keyboard
Graphical Social Symbols
CSS3 Style Generator
OCR
Web Page to Image
Web Page to PDF
Merge PDF
Split PDF
Latex Equation Editor
Extract Images from PDF
Convert JPEG to PS
Convert Latex to Word
Convert Word to PDF
Image Converter
PDF Converter
Community
Sciweavers
About
Terms of Use
Privacy Policy
Cookies
Free Online Productivity Tools
i2Speak
i2Symbol
i2OCR
iTex2Img
iWeb2Print
iWeb2Shot
i2Type
iPdf2Split
iPdf2Merge
i2Bopomofo
i2Arabic
i2Style
i2Image
i2PDF
iLatex2Rtf
Sci2ools
40
click to vote
ITC
2003
IEEE
favorite
Email
discuss
report
116
views
Hardware
»
more
ITC 2003
»
Circular BIST testing the digital logic within a high speed Serdes
14 years 5 months ago
Download
www.itcprogramdev.org
High Speed Serializer Deserializers (serdes) are traditionally tested using functional BIST. This paper presents an improved BIST for testing the digital part of a serdes using circular BIST.
Graham Hetherington, Richard Simpson
Real-time Traffic
Circular Bist
|
Functional Bist
|
Hardware
|
Improved Bist
|
ITC 2003
|
claim paper
Post Info
More Details (n/a)
Added
04 Jul 2010
Updated
04 Jul 2010
Type
Conference
Year
2003
Where
ITC
Authors
Graham Hetherington, Richard Simpson
Comments
(0)
Researcher Info
Hardware Study Group
Computer Vision