Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

96

Voted

ITC
2002
IEEE

102views Hardware» more ITC 2002»

Adapting an SoC to ATE Concurrent Test Capabilities

15 years 10 months ago

Adapting an SoC to ATE Concurrent Test Capabilities

Download www.ra.informatik.uni-stuttgart.de

Rainer Dorsch, Ramón Huerta Rivera, Hans-Jo

Real-time Traffic

Hardware | ITC 2002 |

claim paper

Related Content

» An novel Methodology for Reducing SoC Test Data Volume on FPGAbased Testers

» Portable multimedia SoC design a global challenge

» Robust Concurrent Online Testing of NetworkonChipBased SoCs

» HyperProgrammable Architectures for Adaptable Networked Systems

» QOS Driven NetworkonChip Design for Real Time Systems

» Execution context optimization for disk energy

Post Info
More Details (n/a)

Added	15 Jul 2010
Updated	15 Jul 2010
Type	Conference
Year	2002
Where	ITC
Authors	Rainer Dorsch, Ramón Huerta Rivera, Hans-Joachim Wunderlich, Martin Fischer

Comments (0)