Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints

In this paper, a method for the automatic sizing of analog integrated circuits is presented. Basic sizing rules, representing circuit knowledge, are set up before the sizing and are introduced as structural constraints into the sizing process. Systematic consideration of these structural constraints during the automatic sizing prevents pathologically sized circuits and speeds up the automatic sizing. The sizing is done with a sensitivity-based, iterative trust region method.

• Type: Conference
• Year: 1999
• Where: DATE
• Authors: Robert Schwencker, Josef Eckmueller, Helmut E. Graeb, Kurt Antreich
• Keywords: Automatic Sizing, Basic Sizing Rules, DATE 1999, Hardware, Sizing