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32

VLSID
1996
IEEE

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Characteristic polynomial method for verification and test of combinational circuits

14 years 4 months ago

Characteristic polynomial method for verification and test of combinational circuits

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Vishwani D. Agrawal, David Lee

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Boolean Function Correspond | Boolean Functions | Characteristic Polynomials | VLSI | VLSID 1996 |

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Added	07 Aug 2010
Updated	07 Aug 2010
Type	Conference
Year	1996
Where	VLSID
Authors	Vishwani D. Agrawal, David Lee

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