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ANCS
2007
ACM

Low-latency scheduling in large switches

14 years 4 months ago
Low-latency scheduling in large switches
Scheduling in large switches is challenging. Arbiters must operate at high rates to keep up with the high switching rates demanded by multi-gigabit-per-second link rates and short cells. Low-latency requirements of some applications also challenge the design of schedulers. In this paper, we propose the Parallel Wrapped Wave Front Arbiter with Fast Scheduler (PWWFA-FS). We analyze its performance, present simulation results, discuss its implementation, and show how this scheme can provide low latency under light load while scaling to large switches with multi-terabit-per-second throughput and hundreds of ports. Categories and Subject Descriptors C.2.6 [Computer-Communication Networks]: Internetworking
Wladek Olesinski, Nils Gura, Hans Eberle, Andres M
Added 12 Aug 2010
Updated 12 Aug 2010
Type Conference
Year 2007
Where ANCS
Authors Wladek Olesinski, Nils Gura, Hans Eberle, Andres Mejia
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