Dynamic Memory Design for Low Data-Retention Power

Abstract. The emergence of data-intensive applications in mobile environments has resulted in portable electronic systems with increasingly large dynamic memories. The typical operating pattern exhibited by these applications is a relatively short burst of operations followed by longer periods of standby. Due to their periodic refresh requirements, dynamic memories consume substantial power even during standby and thus have a significant impact on battery lifetime. In this paper we investigate a methodology for designing dynamic memory with low data-retention power. Our approach relies on the fact that the refresh period of a memory array is dictated by only a few, worst-case leaky cells. In our scheme, multiple refresh periods are used to reduce energy dissipation by selectively refreshing only the cells that are about to lose their stored values. Additional energy savings are achieved by using error-correction to restore corrupted cell values and thus allow for extended refresh perio...

• Type: Conference
• Year: 2000
• Where: PATMOS
• Authors: Joohee Kim, Marios C. Papaefthymiou
• Keywords: Average Refresh Period, Memory Arrays, Modelling And Simulation, PATMOS 2000, Refresh Period