ET
2010
13 years 11 months ago
2010
Abstract As technology scales down into the nanometer era, delay testing of modern chips has become more and more important. Tests for the path delay fault model are widely used to...
DAC
2005
ACM
14 years 2 months ago
2005
ACM
In this paper we propose a test compaction method for path delay faults in a logic circuit. The method generates a compact set of two-pattern tests for faults on long paths select...
EURODAC
1994
IEEE
14 years 4 months ago
1994
IEEE
This paper presents an algorithm for generation of test patterns for strong robust path delay faults, i.e. tests that propagate the fault along a single path and additionally are ...
EURODAC
1994
IEEE
14 years 4 months ago
1994
IEEE
This paper presents Resist, a recursive test pattern generation (TPG) algorithm for path delay fault testing of scan-based circuits. In contrast to other approaches, it exploits t...
DATE
1999
IEEE
14 years 4 months ago
1999
IEEE
In this paper we show that the already known method of using multiplexers for making the inputs and outputs of the embedded blocks accessible by the primary ports of the Integrate...
DATE
2002
IEEE
14 years 5 months ago
2002
IEEE
Test sets for path delay faults in circuits with large numbers of paths are typically generated for path delay faults associated with the longest circuit paths. We show that such ...
DATE
2002
IEEE
14 years 5 months ago
2002
IEEE
The problem of fault grading for multiple path delay faults is studied and a method of obtaining the exact coverage is presented. The faults covered are represented and manipulate...
DATE
2003
IEEE
14 years 5 months ago
2003
IEEE
The first non-enumerative framework for diagnosing path delay faults using zero suppressed binary decision diagrams is introduced. We show that fault free path delay faults with ...
ATS
2005
IEEE
14 years 6 months ago
2005
IEEE
The need for high-performance pipelined architectures has resulted in the adoption of latch based designs with multiple, interacting clocks. For such designs, time sharing across ...
ASPDAC
2006
ACM
14 years 6 months ago
2006
ACM
- We propose a dynamic test compaction procedure to generate high-quality test patterns for path delay faults. While the proposed procedure generates a compact two-pattern test set...