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35

DAC
2003
ACM

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132views Computer Architecture» more DAC 2003»

Timing optimization of FPGA placements by logic replication

15 years 19 days ago

Timing optimization of FPGA placements by logic replication

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Giancarlo Beraudo, John Lillis

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DAC 2003 | Design Automation | FPGA Placements |

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Added	13 Nov 2009
Updated	13 Nov 2009
Type	Conference
Year	2003
Where	DAC
Authors	Giancarlo Beraudo, John Lillis

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