We propose to introduce redundant interconnects for manufacturing yield and reliability improvement. By introducing redundant interconnects, the potential for open faults is reduced at the cost of increased potential for short faults; overall, manufacturing yield and fault tolerance can be improved. We focus on a post-processing, tree augmentation approach which can be easily integrated in current physical design flows. Our contributions are as follows: ¯ We formulate the problem as a variant of the classical 2-edgeconnectivity augmentation problem in which we take into account such practical issues as wirelength increase budget, routing obstacles, and use of Steiner points. ¯ We show that an optimum solution can always be found on the Hanan grid defined by the terminals and the corners of the feasible routing region. ¯ We give a compact integer program formulation which, for up to 100 terminal nets, is solved in practical runtime by the commercial optimization package CPLEX. ¯ ...
Andrew B. Kahng, Bao Liu, Ion I. Mandoiu