EMSOFT
2011
Springer
13 years 7 days ago
2011
Springer
Given a multi-modal dynamical system, optimal switching logic synthesis involves generating conditions for switching between the system modes such that the resulting hybrid system...
ISQED
2011
IEEE
13 years 4 months ago
2011
IEEE
Due to the dramatic increase in design complexity, verifying the functional correctness of a circuit is becoming more difficult. Therefore, bugs may escape all verification effo...
ASPDAC
2005
ACM
14 years 2 months ago
2005
ACM
It has been shown that Binary Decision Diagram (BDD) based logic synthesis enjoys faster runtime than the classic logic synthesis systems based on Sum of Product (SOP) form. Howev...
FPGA
2006
ACM
14 years 4 months ago
2006
ACM
Abstract--Field-programmable gate-array (FPGA) logic synthesis and technology mapping have been studied extensively over the past 15 years. However, progress within the last few ye...
DATE
2004
IEEE
14 years 4 months ago
2004
IEEE
As we move towards nanometer technology, manufacturing problems become overwhelmingly difficult to solve. Presently, optimization for manufacturability is performed at a post-synt...
ASPDAC
2007
ACM
14 years 4 months ago
2007
ACM
Logic synthesis has made impressive progress in the last decade and has pervaded digital design replacing almost universally manual techniques. A remarkable exception is computer ...
ITC
1994
IEEE
14 years 4 months ago
1994
IEEE
Previous approaches to designing random pattern testable circuits use post-synthesis test point insertion to eliminate random pattern resistant (r.p.r.) faults. The approach taken...
ICCAD
1998
IEEE
14 years 4 months ago
1998
IEEE
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...
ICCAD
1998
IEEE
14 years 4 months ago
1998
IEEE
In this paper, we propose a new logic synthesis methodology to deal with the increasing importance of the interconnect delay in deepsubmicron technologies. We first show that conv...
DAC
2000
ACM
14 years 4 months ago
2000
ACM
In many modern designs, timing is either a key optimization goal and/or a mandatory constraint. We propose the first intellectual property protection technique using watermarking ...