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ISQED
2008
IEEE

Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-Threshold Operation

14 years 5 months ago
Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-Threshold Operation
This paper examines latch style voltage mode sense amplifiers for operation in the sub-threshold region, where VDD<VT. We show that the offset gets worse relative to strong inversion as technology scales. Furthermore, increasing the sizes of devices in the sense amplifier does not yield the reduction of input referred offset according to 1/(WL)0.5 that is achieved for strong inversion operation. We analyze the source of the offset and propose circuit level operating principles for minimizing its impact in subthreshold SAs. This design methodology will optimize subVT SAs for more robust ultra low power operation.
Joseph F. Ryan, Benton H. Calhoun
Added 31 May 2010
Updated 31 May 2010
Type Conference
Year 2008
Where ISQED
Authors Joseph F. Ryan, Benton H. Calhoun
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