An analytic placer for mixed-size placement and timing-driven placement

We extend the APlace wirelength-driven standard-cell analytic placement framework of [21] to address timing-driven and mixedsize (“boulders and dust”) placement. Compared with timingdriven industry tools, evaluated by commercial detailed routing and STA, we achieve an average of 8.4% reduction in cycle time and 7.5% reduction in wirelength for a set of six industry testcases. For mixed-size placement, we achieve an average of 4% wirelength reduction on ISPD02 mixed-size placement benchmarks [18] compared to results of the leading-edge solver, Feng Shui (v2.4) [25]. We are currently evaluating our placer on industry testcases that combine the challenges of timing constraints, large instance sizes, and embedded blocks (both fixed and unfixed).

• Type: Conference
• Year: 2004
• Where: ICCAD
• Authors: Andrew B. Kahng, Qinke Wang
• Keywords: Analytic Placement Framework, Hardware, ICCAD 2004, Large Instance Sizes, Mixed-size Placement Benchmarks