Automatic microarchitectural pipelining

Abstract--This paper presents a method for automatic microarchitectural pipelining of systems with loops. The original specification is pipelined by performing provably-correct transformations including conversion to a synchronous elastic form, early evaluation, inserting empty buffers, anti-tokens, and retiming. The design exploration is done by solving an optimization problem followed by simulation of solutions. The method is explained on a DLX microprocessor example. The impact of different microarchitectural parameters on the performance is analyzed.

• Type: Conference
• Year: 2010
• Where: DATE
• Authors: Marc Galceran Oms, Jordi Cortadella, Dmitry Bufistov, Michael Kishinevsky
• Keywords: Automatic Microarchitectural Pipelining, DATE 2010, DLX Microprocessor Example, Hardware, Synchronous Elastic Form