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    IEEE
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    Efficient on-line interconnect testing in FPGAs with provable detectability for multiple faults

    14 years 5 months ago
    Efficient on-line interconnect testing in FPGAs with provable detectability for multiple faults
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    Vishal Suthar, Shantanu Dutt
    claim paper
    Added 10 Jun 2010
    Updated 10 Jun 2010
    Type Conference
    Year 2006
    Where DATE
    Authors Vishal Suthar, Shantanu Dutt
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