On Modeling Cross-Talk Faults

Circuit marginality failures in high performance VLSI circuits are projected to increase due to shrinking process geometries and high frequency design techniques. Capacitive cross coupling between interconnects is known to be a prime contributor to such failures. In this paper, we present novel techniques to model and prioritize capacitive cross-talk faults. Experimental results are provided to show effectiveness of the proposed modeling technique on industrial circuits.

• Type: Conference
• Year: 2003
• Where: DATE
• Authors: Sujit T. Zachariah, Yi-Shing Chang, Sandip Kundu, Chandra Tirumurti
• Keywords: Capacitive Cross Coupling, Circuit Marginality Failures, DATE 2003, Hardware, Performance Vlsi Circuits