A modular test structure for CMOS mismatch characterization

In this work a new test structure for mismatch characterization of CMOS technologies is presented. The test structure is modular, with a reduced area and it can be inserted in the space between the dies (scribe lines) on the wafers. The test structure has been implemented in a standard 0.18-µm digital CMOS technology.

• Type: Conference
• Year: 2003
• Where: ISCAS
• Authors: Massimo Conti, Paolo Crippa, Francesco Fedecostunte, Simone Orcioni, F. Ricciardi, Claudio Turchetti, Loris Vendrame
• Keywords: 0.18-µm Digital Cmos, CMOS Technologies, ISCAS 2003, Test Structure