NBTI resilient circuits using adaptive body biasing

Reliability has become a practical concern in today’s VLSI design with advanced technologies. In-situ sensors have been proposed for reliability monitoring to provide advance warnings before system errors occur. This paper presents a reliability monitor design for NBTI (Negative Bias Temperature Instability). NBTI is recognized as very critical as it leads to short device lifetime. The proposed reliability monitor not only tracks the NBTI effect but also mitigates the degradation by forward biasing the PMOS. A worst case scenario static stress experiment demonstrates two orders of magnitude improvement in system lifetime using PTM 65nm technology. A ring oscillator example shows how frequency degradation can be compensated. Deployment of the proposed NBTI monitor is also discussed and two compatible strategies are provided to incorporate these monitors efficiently: the first focuses on low area overhead while the second features low power. Categories and Subject Descriptors B.8.1 ...

• Type: Conference
• Year: 2008
• Where: GLVLSI
• Authors: Zhenyu Qi, Mircea R. Stan
• Keywords: GLVLSI 2008, Reliability Monitor, Reliability Monitor Design, Reliability Monitoring, VLSI