Sciweavers

ET
2007
111views more  ET 2007»
14 years 12 days ago
Dynamic Fault Diagnosis of Combinational and Sequential Circuits on Reconfigurable Hardware
This article describes an emulation-based method for locating stuck-at faults in combinational and synchronous sequential circuits. The method is based on automatically designing a...
Fatih Kocan, Daniel G. Saab
DAC
2004
ACM
14 years 4 months ago
On test generation for transition faults with minimized peak power dissipation
This paper presents a method of generating tests for transition faults using tests for stuck-at faults such that the peak power is the minimum possible using a given set of tests ...
Wei Li, Sudhakar M. Reddy, Irith Pomeranz
ICCD
1997
IEEE
94views Hardware» more  ICCD 1997»
14 years 4 months ago
Pseudo-Random Pattern Testing of Bridging Faults
: This paper studies pseudo-random pattern testing of bridging faults. Although bridging faults are generally more random pattern testable than stuck-at faults, examples are shown ...
Nur A. Touba, Edward J. McCluskey
DATE
2002
IEEE
99views Hardware» more  DATE 2002»
14 years 5 months ago
Gate Level Fault Diagnosis in Scan-Based BIST
A gate level, automated fault diagnosis scheme is proposed for scan-based BIST designs. The proposed scheme utilizes both fault capturing scan chain information and failing test v...
Ismet Bayraktaroglu, Alex Orailoglu
DATE
2009
IEEE
94views Hardware» more  DATE 2009»
14 years 7 months ago
Selection of a fault model for fault diagnosis based on unique responses
- We describe a preprocessing step to fault diagnosis of an observed response obtained from a faulty chip. In this step, a fault model for diagnosing the observed response is selec...
Irith Pomeranz, Sudhakar M. Reddy