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    DFT
    1994
    IEEE
    121views VLSI» more  DFT 1994»
    Reconfiguration in 3D Meshes
    14 years 1 months ago
    Reconfiguration in 3D Meshes
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    The 1: track model for fault tolerant 2 0 processor arrays is extended to 30 mesh architectures. Non-intersecting, continuous, straight and non-near miss compensation paths are co...
    Anuj Chandra, Rami G. Melhem
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    DFT
    1994
    IEEE
    157views VLSI» more  DFT 1994»
    An Approach to the Development of a IDDQ Testable Cell Library
    14 years 1 months ago
    An Approach to the Development of a IDDQ Testable Cell Library
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    C. Ferrer, D. Dateo, J. Oliver, Antonio Rubio, M. ...
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    DFT
    1994
    IEEE
    102views VLSI» more  DFT 1994»
    Laser Processes for Defect Correction in Large Area VLSI Systems
    14 years 1 months ago
    Laser Processes for Defect Correction in Large Area VLSI Systems
    Download  deneb.ensc.sfu.ca
    Glenn H. Chapman
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