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PATMOS
2004
Springer
14 years 3 months ago
Leakage Power Analysis and Comparison of Deep Submicron Logic Gates
Basic combinational gates, including NAND, NOR and XOR, are fundamental building blocks in CMOS digital circuits. This paper analyses and compares the power consumption due to tran...
Geoff V. Merrett, Bashir M. Al-Hashimi
PATMOS
2004
Springer
14 years 3 months ago
A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-Chip Buses
Abstract. Crosstalk causes logical errors due to data dependent delay degradation as well as energy consumption and is considered the biggest signal integrity challenge for long on...
Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan
PATMOS
2004
Springer
14 years 3 months ago
Delay Evaluation of High Speed Data-Path Circuits Based on Threshold Logic
The main result is the development, and delay comparison based on Logical Effort, of a number of high speed circuits for common arithmetic and related operations using threshold l...
Peter Celinski, Derek Abbott, Sorin Cotofana
PATMOS
2004
Springer
14 years 3 months ago
Application Analysis with Integrated Identification of Complex Instructions for Configurable Processors
Abstract. An extensible and configurable processor is a programmable platform offering the possibility to customize the instruction set and/or underlying microarchitecture. Efficie...
Nikolaos Kavvadias, Spiridon Nikolaidis
PATMOS
2004
Springer
14 years 3 months ago
Optimal Logarithmic Representation in Terms of SNR Behavior
This paper investigates the Signal-to-Noise Ratio (SNR) performance of the Logarithmic Number System (LNS) representation against the SNR performance of the fixed-point representa...
Panagiotis D. Vouzis, Vassilis Paliouras
Modeling and Simulation
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