186 search results - page 11 / 38 » 1995 high level synthesis design repository |
ISSS
2002
IEEE
14 years 16 days ago
2002
IEEE
Modeling for synthesis and modeling for simulation seem to be two competing goals in the context of C++-based modeling frameworks. One of the reasons is while most hardware system...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of design tools, the application power consumption budget is esti...
DAC
1999
ACM
13 years 12 months ago
1999
ACM
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
Symmetric input identification is an important technique in logic synthesis. Previous approaches deal with this problem by building BDDs and developing algorithms to determine symm...
DAC
2012
ACM
11 years 10 months ago
2012
ACM
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...