306 search results - page 33 / 62 » A 3d-audio reconfigurable processor |
131
Voted
ISCAS
2006
IEEE
15 years 10 months ago
2006
IEEE
— This paper proposes a new reconfigurable architecture for multi-media and wireless communications. The proposed architecture addresses three critical design issues with the loo...
137
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HASE
1997
IEEE
15 years 8 months ago
1997
IEEE
Abstract: We present a time-bounded state-based communication mechanism for dynamically reconfigurable embedded systems. The mechanism is a single-processor, low-overhead version o...
142
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DATE
2002
IEEE
15 years 9 months ago
2002
IEEE
In this paper, we investigate the benefits of a flexible, application-specific instruction set by adding a run-time Reconfigurable Functional Unit (RFU) to a VLIW processor. Preli...
137
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ERSA
2006
15 years 5 months ago
2006
Abstract-- In heterogeneous tiled System-on-Chip architectures a Network-on-Chip is used to transport messages between processing elements. A reconfigurable network interface is us...
156
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RECONFIG
2008
IEEE
15 years 10 months ago
2008
IEEE
This paper describes an efficient arithmetic processor for elliptic curve cryptography. The proposed processor consists of special architectural components, the most important of...