1404 search results - page 1 / 281 » A C to Hardware Software Compiler |
FCCM
2000
IEEE
13 years 12 months ago
2000
IEEE
Improvements in the FPGA technology have resulted in
CODES
2003
IEEE
14 years 22 days ago
2003
IEEE
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
Speculative compiler optimizations are effective in improving both single-thread performance and reducing power consumption, but their implementation introduces significant compl...
VLSID
2007
IEEE
14 years 7 months ago
2007
IEEE
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
DATE
2002
IEEE
14 years 12 days ago
2002
IEEE
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...