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DATE
2002
IEEE
137views Hardware» more  DATE 2002»
14 years 1 months ago
Practical Instruction Set Design and Compiler Retargetability Using Static Resource Models
The design of application (-domain) specific instructionset processors (ASIPs), optimized for code size, has traditionally been accompanied by the necessity to program assembly, ...
Qin Zhao, Bart Mesman, Twan Basten
DAC
2009
ACM
14 years 9 months ago
Designing heterogeneous ECU networks via compact architecture encoding and hybrid timing analysis
In this paper, a design method for automotive architectures is proposed. The two main technical contributions are (i) a novel hardware/software architecture encoding that unifies ...
Jürgen Teich, Martin Lukasiewycz, Michael Gla...
ESTIMEDIA
2008
Springer
13 years 10 months ago
Serialized multitasking code generation from dataflow specification
This paper is concerned about multitasking embedded software development from the system specification to the final implementation including design space exploration(DSE). In the ...
Seongnam Kwon, Soonhoi Ha
FPGA
2008
ACM
129views FPGA» more  FPGA 2008»
13 years 10 months ago
Efficient ASIP design for configurable processors with fine-grained resource sharing
Application-Specific Instruction-set Processors (ASIP) can improve execution speed by using custom instructions. Several ASIP design automation flows have been proposed recently. ...
Quang Dinh, Deming Chen, Martin D. F. Wong
SAMOS
2007
Springer
14 years 2 months ago
An Evolutionary Approach to Area-Time Optimization of FPGA designs
—This paper presents a new methodology based on evolutionary multi-objective optimization (EMO) to synthesize multiple complex modules on programmable devices (FPGAs). It starts ...
Fabrizio Ferrandi, Pier Luca Lanzi, Gianluca Paler...