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VLSID
2006
IEEE
119views VLSI» more  VLSID 2006»
14 years 8 months ago
Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core
Performance of applications can be boosted by executing application-specific Instruction Set Extensions (ISEs) on a specialized hardware coupled with a processor core. Many commer...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...
FPL
2004
Springer
141views Hardware» more  FPL 2004»
14 years 1 months ago
Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs
—This paper presents a methodology and a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology and...
Zachary K. Baker, Viktor K. Prasanna
VLSID
2005
IEEE
158views VLSI» more  VLSID 2005»
14 years 8 months ago
Algorithmic Implementation of Low-Power High Performance FIR Filtering IP Cores
This paper presents two schemes for the implementation of high performance and low power FIR filtering Intellectual Property (IP) cores. Low power is achieved through the utilizat...
C. H. Wang, Ahmet T. Erdogan, Tughrul Arslan
FPL
2007
Springer
138views Hardware» more  FPL 2007»
14 years 2 months ago
Bringing High-Performance Reconfigurable Computing to Exact Computations
Numerical non-robustness is a recurring phenomenon in scientific computing. It is primarily caused by numerical errors arising because of fixed-precision arithmetic in integer and...
Esam El-Araby, Ivan Gonzalez, Tarek A. El-Ghazawi
RECONFIG
2008
IEEE
198views VLSI» more  RECONFIG 2008»
14 years 2 months ago
High Performance Implementation of a Public Key Block Cipher - MQQ, for FPGA Platforms
– We have implemented in FPGA recently published class of public key algorithms – MQQ, that are based on quasigroup string transformations. Our implementation achieves decrypti...
Mohamed El-Hadedy, Danilo Gligoroski, Svein J. Kna...