Sciweavers

833 search results - page 81 / 167
» A Design and Test Technique for Embedded Software
Sort
View
DAC
2011
ACM
12 years 8 months ago
Characterizing within-die and die-to-die delay variations introduced by process variations and SOI history effect
Variations in delay caused by within-die and die-to-die process variations and SOI history effect increase timing margins and reduce performance. In order to develop mitigation te...
Jim Aarestad, Charles Lamech, Jim Plusquellic, Dhr...
ICSM
2007
IEEE
14 years 3 months ago
Design recovery and maintenance of build systems
The build system forms an indispensable part of any software project. It needs to evolve in parallel with the source code in order to build, test and install the software. Unfortu...
Bram Adams, Herman Tromp, Kris De Schutter, Wolfga...
VLSID
2008
IEEE
122views VLSI» more  VLSID 2008»
14 years 3 months ago
Implementing the Best Processor Cores
It is well-known that varying architectural, technological and implementation aspects of embedded microprocessors, such as ARM, can produce widely differing performance and power ...
Vamsi Boppana, Rahoul Varma, S. Balajee
DATE
2007
IEEE
102views Hardware» more  DATE 2007»
14 years 3 months ago
Efficient testbench code synthesis for a hardware emulator system
: - The rising complexity of modern embedded systems is causing a significant increase in the verification effort required by hardware designers and software developers, leading to...
Ioannis Mavroidis, Ioannis Papaefstathiou
ISSTA
2004
ACM
14 years 2 months ago
Evolutionary testing in the presence of loop-assigned flags: a testability transformation approach
Evolutionary testing is an effective technique for automatically generating good quality test data. However, for structural testing, the technique degenerates to random testing i...
André Baresel, David Binkley, Mark Harman, ...