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KDD
2006
ACM
253views Data Mining» more  KDD 2006»
14 years 7 months ago
Adaptive Website Design Using Caching Algorithms
Visitors enter a website through a variety of means, including web searches, links from other sites, and personal bookmarks. In some cases the first page loaded satisfies the visi...
Justin Brickell, Inderjit S. Dhillon, Dharmendra S...
FPL
1999
Springer
103views Hardware» more  FPL 1999»
13 years 11 months ago
IP Validation for FPGAs Using Hardware Object Technology
Although verification and simulation tools are always improving, the results they provide remain hard to analyze and interpret. On one hand, verification sticks to the functional ...
Steve Casselman, John Schewel, Christophe Beaumont
ICC
2007
IEEE
143views Communications» more  ICC 2007»
14 years 1 months ago
Impact of Sampling Jitter on Mostly-Digital Architectures for UWB Bio-Medical Applications
Abstract— Ultra-wideband (UWB) impulse radio is a promising technique for low-power bio-medical communication systems. While a range of analog and digital UWB architectures exist...
Andrew Fort, Mike Chen, Robert W. Brodersen, Claud...
DAC
1996
ACM
13 years 11 months ago
Optimal Clock Skew Scheduling Tolerant to Process Variations
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
José Luis Neves, Eby G. Friedman
FPGA
1999
ACM
174views FPGA» more  FPGA 1999»
13 years 11 months ago
Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
Peter Kollig, Bashir M. Al-Hashimi