814 search results - page 36 / 163 » A Design of the Signal Processing Hardware Platform for Comm... |
PEWASUN
2005
ACM
14 years 2 months ago
2005
ACM
We derive the optimum and suboptimum selective rake receivers (SRRs) for fading environment exhibiting impulsive nature. Simulation results confirm that, when the noise is impuls...
EH
2005
IEEE
14 years 2 months ago
2005
IEEE
The hybrid redundancy structure found at the cellular level of higher animals provides complex organism with the three key features of a reliability-engineered system: fault toler...
RSP
2005
IEEE
14 years 2 months ago
2005
IEEE
Embedded signal processing systems are usually associated with real-time constraints and/or high data rates so that fully software implementation are often not satisfactory. In th...
ASAP
2007
IEEE
13 years 11 months ago
2007
IEEE
Interconnect validation is an important early step toward global SoC (System-On-Chip) validation. Fast performances evaluation and design space exploration for NoCs (Networks-On-C...
DATE
2002
IEEE
14 years 2 months ago
2002
IEEE
We consider the implication of deep sub-micron VLSI technology on the design of communication frameworks for parallel DSP systems-on-chip. We assert that distributed data transfer...